The invention relates to a method of driving a liquid crystal display, and more particularly to a method of driving an active matrix liquid crystal display including thin film field effect transistors and liquid crystal cell capacitors.
Recently, active matrix liquid crystal display have become attractive due to advantages such as a high quality picture, small size, low power consumption and relatively low cost manufacture. The conventional active matrix liquid crystal display includes a plurality of cells which are arranged in matrix. The active matrix liquid crystal display includes a plurality of columns of data lines and a plurality of rows of gate lines, both of which form the matrix.
FIG. 1 illustrates the structure of each matrix cell of the active matrix liquid crystal display. Each matrix cell of the liquid crystal display comprises gate lines 1, source lines 2 serving as data lines, a capacitor comprising a pixel electrode 3 and an opposite electrode and a thin film field effect transistor 4. The gate line 1 and the source line 2 are made of a metal such as chrome or aluminium. The pixel electrode 3 and the opposite electrode are formed on one substrate and on an opposite substrate respectively. The pixel electrode 3 of the capacitor is made of a transparent metal such as indium oxide or tin oxide. The thin film field effect transistor 4 is formed by using amorphous silicon.
FIG. 2 illustrates an equivalent circuit of each matrix cell of the active matrix liquid crystal display illustrated in FIG. 1. The circuit structure of each matrix includes columns of the source lines 2 serving as data lines and rows of the gate lines 1, both of which are crossed with each other at right angle but not contact with each other. The thin film field effect transistor 4 is connected at its gate to the gate line 1. The thin film field effect transistor 4 is also connected at its source to the source line 2. The thin film field effect transistor 4 is also connected at its drain to the pixel electrode 3 of a capacitor 5. The capacitor 5 comprises a liquid crystal cell. The liquid crystal cell capacitor 5 comprises the pixel electrode 3 and an opposite electrode COM.
The control voltage signals of the scanning pulses are transmitted through a gate line Gn of the gate lines 1 and applied to the gate of the thin film field effect transistor 4. The thin film field effect transistor 4 serves as a switching device being operated depending upon the control voltage signals of the scanning pulses transmitted through the gate line Gn. The image signals as image data are transmitted through the source lines S.sub.m and S.sub.m+1 serving as the data lines 2. When the thin film field effect transistor 4 takes ON state, the image signals as the image data are transmitted through the thin film field effect transistor 4 to the pixel electrode 3 of the liquid crystal capacitor 5. Thus, the image signals are applied to the pixel electrode 3 of the liquid crystal capacitor 5. After that, the thin film field effect transistor 4 turns OFF according to the control voltage signals of the scanning pulses thereby maintaining the voltage as the image signal applied to the pixel electrode 3 of the liquid crystal capacitor 5 constant. Thus, the liquid crystal capacitor 5 of the matrix cell serves as a memory cell which stores the image signal. The gray level of each pixel of the active matrix liquid crystal display is dependent upon the voltage level applied to the pixel electrode 3 of the liquid crystal capacitor 5 of the each matrix cell.
The achievement of an excellent picture on the active matrix liquid crystal display requires each liquid crystal capacitor cell 5 to have stability in its potential during the OFF state of the thin film field effect transistor 4. Namely, it is required to keep the voltage signal as the. image data stored in the pixel capacitor 3 from being varied during the OFF state of the thin film field effect transistor 4.
On the other hand, such active matrix liquid crystal display is required to have a high integration. The improvement of the high integration of the active matrix liquid crystal display is coupled with a disadvantage in crosstalk. In FIGS. 1 and 2, the achievement of the high integration of the active matrix liquid crystal display forces the distance between the pixel electrode 3 and the data lines 2, or the source lines S.sub.m and S.sub.m+1, to be small. This forms capacitive coupling, and thus the parasitic capacitance C.sub.sp1 and C.sub.sp2 between the pixel electrode 3 and the data lines 2 or the source lines S.sub.m and S.sub.m+1. Thus, the equivalent circuit illustrated in FIG. 2 includes parasitic capacitors 6 having parasitic capacitance C.sub.sp1 and C.sub.sp2. The parasitic capacitor 6 having the parasitic capacitance C.sub.sp1 is formed between the source line S.sub.m and the pixel electrode of the liquid crystal cell capacitor 5 having a capacitance C.sub.LC. The parasitic capacitor 6 having the parasitic capacitance C.sub.sp2 is formed between the source line S.sub.m+1 and the pixel electrode of the liquid crystal cell capacitor 5.
When the image signals are applied on the data lines 2, or the source lines S.sub.m and S.sub.m+1, the pixel capacitor S between the data lines 2 of the liquid crystal cell capacitor 5 are subjected to change of their potential. The voltage applied on the data lines 2 provides an undesirable effect in parallel to the pixel electrode 3 of the liquid crystal cell capacitor 5. This causes the crosstalk of the pixel electrode 3 of the liquid crystal cell capacitor 5. The potential V.sub.LC of the pixel electrode 3 of the liquid crystal capacitor cell 5 is varied in dependence upon the parasitic capacitance C.sub.sp1 and C.sub.sp2 and the variations of the voltages V.sub.Sm and V.sub.Sm+1 of the image signals applied on the source lines S.sub.m and S.sub.m+1. A variation .DELTA.V.sub.LC1 of the potential of the pixel capacitor 3 of the liquid crystal cell capacitor 5 is caused by the voltage signal applied on the source line S.sub.m. A variation .DELTA.V.sub.LC2 of the potential of the pixel capacitor 3 of the liquid crystal cell capacitor 5 is caused by the voltage signal applied on the source line S.sub.m+1. The variations .DELTA.V.sub.LC1 and .DELTA.V.sub.LC2 of the potential of the pixel electrode 3 are respectively given by: EQU .DELTA.V.sub.LC1 =.DELTA.V.sub.Sm .times.C.sub.sp1 /(C.sub.sp1 +C.sub.sp2 +C.sub.LC) (1),
and EQU .DELTA.V.sub.LC2 =.DELTA.V.sub.Sm+1 .times.C.sub.sp2 /(C.sub.sp1 +C.sub.sp2 +C.sub.LC) (2).
The potential variation of the pixel electrode 3 of the liquid crystal cell capacitor 5 is defined by the addition of the variations .DELTA.V.sub.LC1 and .DELTA.V.sub.LC2. If the addition of the variations .DELTA.V.sub.LC1 and .DELTA.V.sub.LC2 is zero, there exist no potential variation of the pixel electrode 3 and thus no crosstalk in the cell of the active matrix liquid crystal display. If the crosstalk exists in the cell of the active matrix liquid crystal display and thus the addition of the variations .DELTA.V.sub.LC1 and .DELTA.V.sub.LC2 is not zero, undesirable effects caused by the crosstalk appear on the liquid crystal display in a direction parallel to the column data lines 2.
As described the above, the realization of an excellent picture on the liquid crystal display requires keeping the potential of the pixel electrode 3 constant. If, however, the crosstalk appears at the pixel electrode 3 of the liquid crystal cell capacitor 5, it is no longer possible to realize an excellent picture on the liquid crystal display.
To combat the above disadvantage in the crosstalk, the conventional active matrix display has so driven the data lines 2 that the voltage signals regarded as the image signals having different polarities from one another are applied on adjacent two data lines, or the adjacent source lines S.sub.m and S.sub.m+1. Namely, the alternation of the image voltage signals data line by data line are applied. As a result, the potential variations .DELTA.V.sub.LC1 and .DELTA.V.sub.LC2 of of the pixel electrode 3 have opposite signs relative to one another thereby resulting in a small value of the addition of the potential variations .DELTA.V.sub.LC1 and .DELTA.V.sub.LC2, and thus a small potential variation of the pixel electrode 3.
To eliminate the above disadvantage in the crosstalk, the conventional driving operation of the data lines 2 in the active matrix liquid crystal display will be described. FIG. 3 illustrates wave-forms of the control voltage signals applied on the gate lines 1 and the image voltage signals applied on the data lines 2. In FIG. 3, V.sub.Gn is a wave-form of the control voltage signal as the scanning pulse applied on the gate line G.sub.n. V.sub.Gn+1 is a wave-form of the control voltage signal as the scanning pulse applied on the gate line G.sub.n+1. V.sub.COM are wave-forms of the voltages applied to the opposite electrodes of the liquid crystal cell capacitors 5. V.sub.Sm is a wave-form of the image voltage signal applied on the source line S.sub.m. V.sub.Sm+1 is a wave-form of the image voltage signal applied on the source line S.sub.m+1. T is the period of the image voltage signal for each pixel. The image voltage signals V.sub.Sm and V.sub.Sm+1 have wave-forms of alternating voltage pulses, thereby resulting in the alternating driving of the liquid crystal cell. This secures long life time of the liquid crystal display. The polarity of each of the image voltage signals V.sub.Sm and V.sub.Sm+1 is inverted on every ON signals of the scanning pulses V.sub.Gn and V.sub.Gn+1 applied on the gate lines G.sub.n and G.sub.n+1. On each period T of the image voltage signal for each pixel, the polarities of the image voltage signals V.sub.Sm and V.sub.Sm+1 are inverted relative to one another.
Actually, however, the image voltage signals V.sub.Sm and V.sub.Sm+1 have asymmetry relative to each other. In this case, the addition of both the potential variation values of the pixel capacitor 3 caused by the image voltage signals V.sub.Sm and V.sub.Sm+1 applied on the source lines S.sub.m and S.sub.m+1 is not zero. Thus the pixel electrode 3 of the liquid crystal cell capacitor 5 has a potential variation caused by crosstalk.
One of techniques for compensation of the crosstalk is disclosed in IEEE, 1988, 1988 International Display Research Conference, "Eliminating Crosstalk in Thin Film Transistor/Liquid Crystal Displays", pp. 230-235. The conventional technique for compensation of crosstalk employs addressing each display cell for a half time interval T/2 of the interval T required to address each cell of the active matrix liquid crystal display as described the above. FIG. 4 illustrates wave-forms of the gate control voltage of the scanning pulses V.sub.Gi, V.sub.Gi+1 and V.sub.Gi+2 and the image voltage signal V.sub.DATA as image data.
In FIG. 4, the high voltage signal making the switching transistor take the ON state is applied on the gate lines for the first half of the time period T which was required in the prior art to address each cell of the active matrix liquid crystal display. Then, the transistor serving as a switching device takes ON state for the first half interval T/2. As a result, each of the image data voltage signals having values V.sub.i, V.sub.i+1 and V.sub.i+2 is transmitted through the transistor 4 to the pixel capacitor 3 of the liquid crystal cell capacitor 5.
After that, the low voltage signal making the switching transistor the OFF state is applied on the gate lines for the latter half of the time period T which was required in the prior art to address each cell of the active matrix liquid crystal display. Then, the transistor serving as a switching device takes OFF state for the latter half interval T/2. As a result, each of data complement voltages V.sub.M -V.sub.i, V.sub.M -V.sub.i+1 and V.sub.M -V.sub.i+2 are applied on the data lines, but not transmitted through the transistor 4 to the pixel capacitor 3 of the liquid crystal cell capacitor 5. The values V.sub.M -V.sub.i, V.sub.M -V.sub.i+1 and V.sub.M -V.sub.i+2 of the voltage signals are defined by subtracting the image data voltage values V.sub.i, V.sub.i+1 and V.sub.i+2 from a predetermined constant value, for example, a maximum value V.sub.M. The time average of the image data voltage signal and the data complement voltage signal is the same on its absolute value in every time intervals T. The absolute values of the averages of the voltage signals, both of which are applied on adjacent data lines, are the same one another. The symmetry of the voltage signals synchronizing with one another and being applied on the adjacent data lines is improved, however not completely.
One example of the monotone displays is illustrated in FIG. 5. FIG. 6 illustrates wave-forms of the gate control voltages of the scanning pulses V.sub.G1, V.sub.G2, V.sub.G3 and V.sub.G4 and the image data voltage signals V.sub.D0, V.sub.D1 and V.sub.D2, in addition the crosstalks of the matrix cells (0,0) and (0,1). In this case, the monotone display will be accomplished. The image data voltage signals applied on the data lines V.sub.D0 and V.sub.D1 are symmetrical. Then, the cell capacitor (0,0) having the parasitic couplings with the data lines D.sub.0 and D.sub.1 suffers no affect in the crosstalk. In contrast, the image data voltage signals applied on the data lines V.sub.D1 and V.sub.D2 are asymmetrical. Then, the cell capacitor (1,0) having the parasitic couplings with the data lines D.sub.1 and D.sub.2 suffers an affect in the crosstalk as illustrated in FIG. 6. The crosstalk appears in the second and fourth intervals. Namely, in the second and fourth time interval T, such crosstalk appears for not only the first half interval, in which the image data voltage signal is applied, but also the latter half interval, in which the data complement voltage is applied.
In the above conventional technique using the data complement voltage, when the gray levels for adjacent cells respectively connected to the adjacent data lines are different from one another, neither the image data voltage signals applied for the first half interval nor the data complement voltage signals applied for latter half interval is symmetrical. Thus, such driving method is unable to cancel the potential variations of the cell capacitor (1,0), both of which are caused by the asymmetrical voltage signals applied on the data lines D.sub.1 and D.sub.2 respectively, thereby permitting the crosstalk to appear every column-aligned cells between the data lines D.sub.1 and D.sub.2. Then, the liquid crystal display of the active matrix has the undesirable picture affect caused by the crosstalk in a direction parallel to the column data lines. Therefore, the conventional technique using the data complement signals unables to compensate for crosstalk completely.
The realization of an excellent and fine picture on liquid crystal displays requires such undesirable crosstalk to be reduced considerably. It is, thus, required to develop a novel driving method of the data lines involved in the active matrix liquid crystal display thereby making the display free from crosstalk.